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PCB Design Checklist

An ever expanding list of tips, tricks and things to keep in mind when designing PCBs

This page is a repository, of sorts, of various tips and tricks I've picked up myself through books, app notes, or just experience doing everything the wrong way. It's neither authoritative nor can I promise that everything here is the best solution (assuming there even is a 'best' solution), but it comes out of my own dissatisfaction with many of the tutorials and resources on the web that don't always do a great job of explaining certain important subjects as clearly as they could or in one place.

Useful Numbers


While not design tips, per se, the following ballpark figures and numbers may be useful to keep in mind designing your PCB.

Traces and Vias

  • A 10 mil (0.25mm) trace on 1oz copper (0.036mm/0.0014" thick) has a resistance of about 19 mΩ per cm in length (or 48 mΩ /inch).
  • A 0.4mm via in a 1.5mm thick PCB adds ~1.1nH of inductance and ~0.5pF of capacitance.

Parasitics

  • The inductance of component leads above a GND plane is ~10 nH per cm of lead length. The smaller the leads, the less parasitic inductance you will have.

Project Management


Schematic Symbol/Footprint Design


Schematic Capture


Show Your Work

It's high school math class all over again! If you want full points, you need to show not just the final calculated results but also include your work, meaning any formulas or information required to arrive at the values you've chosen.

For example, rather than just saying that a 50 ohm microstrip antenna trace should be 70 mil wide, show the formula or some basic information why it should be 70 mil since this will depend on the substrate thickness and material chosen (FR4, etc.), the thickness of the copper (1oz/35um or 2oz/70um), the frequency, etc.

Example: Calculating resistor values for 5.0V and 3.3V output on a DC/DC converterFormula to calculate VOUT on a DC/DC converter

Board Layout


Keep high-speed signals close to the GND plane

High speed signals should be kept as close to the GND plane as possible, ideally with a signal layer on the top and a GND plane on layer two directly underneath.  This helps avoid crosstalk, as can be seen in the diagram below illustrating two traces at varying heights from the GND plane.  The potential crosstalk varies according to the amount of magentic force that passes beneath the trace and the GND plane, indicated by the number of lines beneath the trace. Making the traces an appropriate width, and placing them closer to the GND plan helps reduce crosstalk.

Crosstalk is extremely sensitive to trace height (you can see that trace D has 1/4 the crosstalk of trace B in the diagram below).  Keeping the trace height to a minimum is the single most effective thing you can do to reduce crosstalk.

Source: EETimes Fundamentals of PCB Design by Howard Johnson (course 3767)

Route power and GND signals in parallel

In order to reduce loop impedance, if a solid GND plane directly underneath all signals isn't possible then power and GND signals should always be routed in parallel (side-by-side) or directly on top of the other (on adjacent layers when using a multi-layer board):

Source: NXP Semiconductors - AN10897 (Rev 02) p.24
Try to route power and GND signals in parallel

Route differential signals adjacent to each other and keep them identical in length

Differential signals like D+ and D- with USB have better signal integrity and are protected from glitches since the lines are always complementary. A 1 on the first line is mirrored by a 0 on the second line, so even if there is a glitch on the lines, if both lines go high the data will be invalid.

In order to take full advantage of magnetic field cancellation, and to ensure reliable data transfers, route differential signals adjacent to each other, and place a GND guard traces on both sides of the entire length of the differential-pair.

To ensure accurate and high-speed data transfers, make sure the differential lines are identical in length. For USB, for example, ensure that the D+ and D- lines are both the same length to ensure that the signals are sent and received at the same time.

Eagle Tip: You can see the length of any trace in Eagle by running length-freq-ri.ulp (just type 'run length-freq-ri' in the command bar):

Calculate trace length in Eagle

Special Note: This is important for USB, particularly at high-speed
Use several package sizes for decoupling caps with sensitive parts

If a sensitive part requires several decoupling caps, try to use different package sizes for each part because each package size has different parasitic properties or may cause problems only at a certain frequency. For example, if you require a 0.1uF and a 10uF ceramic cap for decoupling, use, for example, 0603 for the 0.1uF and 0805 for the 10uF caps. Place the caps from smallest value to largest value going out from the pin, placing the 0.1uF as close as possible followed by the 10uF cap. Connect the other half of the caps directly to GND as much as possible, placing a via as close as you can get it to the cap.

Keep high-speed digital, control, interrupt and reset signals away from the edge of the PCB

High-speed digital signals such as data, address, and control lines of microprocessors should be grouped together and located as far from the I/O connector(s) on the board's edge as possible.

Source: NXP Semiconductors - AN10897 (Rev 02) p. 26

Route a GND trace adjacent to the Least Significant Bit (LSB) of the address on any high-speed device (DRAM, SRAM, LCDs, etc.)

A GND trace should be placed adjacent to the Least Significant Bit (LSB) of the address on any high-speed device (DRAM, SRAM, LCDs, etc.) since this is usually a very active signal and may need isolation if toggled at very high speed.

Place GND pins between sensitive lines on connectors

Connectors on your PCB pose a problem since they require running a lot of potentially sensitive or troublesome signals in parallel to each other.  To minimize crosstalk or other problems, place a GND signal between sensitive lines or groups of traces.. For example, seperate ADC inputs from digital logic by placing a GND pin on either side of the ADC inputs.

Use multiple GND pins when possible

Related to the above point ... "Multiple ground pins are important [...]: they keep down the ground impedance at the junction between the board and the backplane. The contact resistance of a single pin of a PCB connector is quite low (typically on the order of 10 mΩ) when the board is new—as the board gets older the contact resistance is likely to rise, and the board's performance may be compromised. It is therefore well worthwhile to allocate extra PCB connector pins so that there are many ground connections (perhaps 30% to 40% of all the pins on the PCB connector should be ground pins). For similar reasons there should be several pins for each power connection."

Source: Analog Devices: Linear Circuit Design Handbook (ch. 12)